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TUESDAY, June 8, 2004, 2:00 PM - 4:00 PM | Room: 6D
TOPIC AREA:  EMBEDDED SYSTEMS

   SESSION 9
  Performance Evaluation and Run Time Support
  Chair: Joerg Henkel - Univ. of Karlsruhe, Karlsruhe, Germany
  Organizers: Radu Marculescu, Rainer Leupers

  Evaluating system performance is a critical issue in systems design. Of particular interest is performance evaluation at higher levels of abstraction. The papers in this session cover techniques ranging from WCET to run-time support for various architectures and platforms. The first two papers deal with early performance estimation. The next two propose new optimization techniques for dynamic scheduling. Finally, the last paper presents an area estimation technique for reconfigurable devices.

    9.1   Abstraction of Assembler Programs for Symbolic Worst Case Execution Time Analysis
  Speaker(s): Tobias Schuele - Univ. of Kaiserslautern, Kaiserslautern, Germany
  Author(s): Tobias Schuele - Univ. of Kaiserslautern, Kaiserslautern, Germany
Klaus Schneider - Univ. of Kaiserslautern, Kaiserslautern, Germany
    9.2Extending the Transaction Level Modeling Approach for Fast Communication Architecture Exploration
  Speaker(s): Sudeep Pasricha - Univ. of California, Irvine, CA
  Author(s): Sudeep Pasricha - Univ. of California, Irvine, CA
Nikil Dutt - Univ. of California, Irvine, CA
Mohamed Ben-Romdhane - Conexant Systems, Inc., Newport Beach, CA
    9.3Specific Scheduling Support to Minimize the Reconfiguration Overhead of Dynamically Reconfigurable Hardware
  Speaker(s): Javier Resano - Univ. Complutense de Madrid, Madrid, Spain
  Author(s): Javier Resano - Univ. Complutense de Madrid, Madrid, Spain
Diederik Verkest - IMEC, Leuven, Belgium
Daniel Mozos - Univ. Complutense de Madrid, Madrid, Spain
Francky Catthoor - IMEC, Leuven, Belgium
Serge Vernalde - IMEC, Leuven, Belgium
    9.4sLODS: Locality-Oriented Dynamic Scheduling for On-Chip Multiprocessors
  Speaker(s): Mahmut Kandemir - Penn State Univ., University Park, PA
  Author(s): Mahmut Kandemir - Penn State Univ., University Park, PA
    9.5sAn Area Estimation Methodology for FPGA Based Designs at System-C Level
  Speaker(s): Carlo Brandolese - Politecnico di Milano, Milano, Italy
  Author(s): Carlo Brandolese - Politecnico di Milano, Milano, Italy
Fabio Salice - Politecnico di Milano, Milano, Italy
William Fornaciari - Politecnico di Milano, Milano, Italy